sandbox-c/file2char/makefile

20 lines
279 B
Makefile

#target: dependency_1 dependency_2 dependency_3 ...
# command
#
RM = /bin/rm -f
OBJ = main.o
EXE = main
CC = /usr/bin/gcc
CFLAGS = -Wall
#
all: $(EXE)
#
$(EXE): $(OBJ)
$(CC) $(CFLAGS) $(OBJ) -o $(EXE)
#
main.o: main.c
$(CC) -c main.c -o main.o
#
clean:
$(RM) $(OBJ) $(EXE) *~